1. Field of the Invention
The present invention relates to a device for and method of managing power during a period when the power is off and, more particularly, to a circuit for and method of managing power in the power off mode, wherein the 5-volt power of a microcomputer is separately controlled such that the microcomputer enters the sleep mode in order to economize the power more effectively than the power save mode, that is, DPMS off mode.
2. Discussion of Related Art
Generally, a display device comprises control means for saving consumption power. In one approach, the control means may be implemented by a display power management system (DPMS), proposed by Video Electronics Standard Association (VESA) in U.S.A.
The DPMS functions to manage power of a display device, which is one of the peripheral devices of a computer, according to a used state of the computer to save the power.
In conformity with the VESA, the computer selectively supplies or blocks horizontal and vertical synchronous signals to the display device according to its used state, and the display device manages power according to the presence of the horizontal and vertical synchronous signals from the computer.
As an effort to save power for the display monitor, the DPMS mode is executed according to the presence of synchronous signals for synchronizing picture signals processed from a video card. For the DPMS mode, the microcomputer enters the standby mode, suspend mode and DPMS off mode in sequence according to the presence of synchronous signals.
The power management states are classified into an on state, a stand-by state, a suspend state and a power off state. Both the horizontal and vertical synchronous signals are applied at the on state, and only the vertical synchronous signal is applied at the stand-by state. Only the horizontal synchronous signal is applied at the suspend state, and either the horizontal or vertical synchronous signal is not applied at the power off state.
The power management state is sequentially changed to the on state stand-by state suspend state power off state with the continuous lapse of unused time of the computer. It is commonly prescribed that consumption power of the display device be about 80 W at the on state, 65 W or less at the stand-by state, 25 W or less at the suspend state and 5 W or less at the power off state.
An exemplary display monitor employing the DPMS mode will now be described. A computer is composed of a central processing unit (CPU) for processing a received keyboard signal, and a video card for processing data output from the CPU into RGB picture signals. The video card also generates horizontal and vertical sync signals for synchronizing the RGB picture signals.
A display monitor displays the RGB picture signals received from the video card and is composed of a control key section for generating a key signal to regulate the screen of the display monitor. A microcomputer receives to the horizontal and vertical sync signals from the video card and the key signal from the control key section. The microcomputer generates an image adjusting signal and a reference oscillating signal in response to the key signal. A horizontal and vertical output circuit section synchronizes the RGB picture signals in response to the image adjusting signal and the reference oscillating signal from the microcomputer. A video circuit section amplifies the RGB picture signals received from the video card 120. A power circuit section supplies a driving voltage to the microcomputer, the horizontal and vertical output circuit section and the vide circuit section.
The horizontal and vertical output circuit section includes a horizontal/vertical oscillating signal processor which receives the image adjusting signal and the reference oscillating signal from the microcomputer and generates horizontal and vertical oscillating pulses to control the switching rate of a sawtooth generating circuit in accordance with the horizontal and vertical sync signals received from the video card. A vertical drive circuit boosts the vertical oscillating pulse, generating a drive current. The most commonly used vertical drive circuit is a single-stage vertical amplifier, especially, an emitter-follower type amplifier wherein the transistor receives an input at its base and draws the output voltage at its emitter. Accordingly, it improves linearity than gain. Receiving the drive current amplified from the vertical drive circuit, a vertical output circuit sends a sawtooth current corresponding to the vertical synchronizing pulse to a deflection yoke, thereby determining a vertical scanning period. A horizontal drive circuit boosts the horizontal oscillating pulse received from the horizontal and vertical oscillating signal processor so as to generate a drive current sufficient to switch a horizontal output circuit. Receiving the drive current from the horizontal drive circuit, the horizontal output circuit generates a sawtooth current corresponding to the horizontal synchronizing pulse to the deflection yoke, determining a horizontal scanning period. There are two driving methods of the horizontal drive circuit: an in-phase method wherein the output is ON with the drive terminal ON, and out-of-phase method wherein the output is OFF when the drive terminal is ON. A high voltage circuit and a flyback transformer are driven in response to the horizontal oscillating pulse applied from the horizontal and vertical oscillating signal processor and generate a high voltage. This high voltage is applied to the anode of the cathode ray tube (CRT), forming an anode surface of the CRT. A video pre-amplifier of the video circuit section boosts weak RGB picture signals received from the video card to a specified voltage level. For example, a weak signal of less than 1 peak-to-peak voltage (hereinafter, referred to as V.sub.pp) is boosted to a 4 to 6 V.sub.pp signal. Thus amplified RGB picture signals are applied to a video output amplifier and are further amplified into a signal of 40 to 60 V.sub.pp, supplying energy to the respective pixels on the screen of the CRT. The scanning period of the image displayed on the screen of the CRT is determined by the deflection yoke DY and the luminance of the image displayed on the screen is regulated on the anode surface of the CRT.
The power circuit section for supplying a driving voltage to display the RGB picture signals on the screen of the CRT is applied with an alternating current (AC) via an AC input. The AC is then sent to a degaussing coil which corrects the colors blotted due to the earth magnetic field or the other external environment into the original ones.
Further, the AC received from the AC input is rectified into a direct current (DC) via a rectifier and applied to a switching transformer. Receiving the DC from the rectifier, the switching transformer supplies all sorts of driving voltages to the interior blocks of the display monitor via a voltage regulator. In this case, an error which occurs in the driving voltage generated from the voltage regulator is detected by a pulse width modulation (PWM) IC. The PWM IC controls the switching time according to the detected error, stabilizing the output voltage of the voltage regulator.
In order to save power in the display monitor, the microcomputer enters the DPMS mode according to the presence of synchronous signals generated from the video card. As for the DPMS mode, the microcomputer enters the standby mode to interrupt the RGB picture signals when the horizontal sync signal is off, while it enters the suspend mode to interrupt the deflection voltage with the vertical sync signal off.
Once the horizontal and vertical sync signals are interrupted, the microcomputer executes the DPMS off mode to interrupt a secondary power of the switching transformer via the PWM IC, saving the power in the display monitor. When the user presses a soft power key, the same effect can be attained as in the DPMS off mode wherein the secondary power of the switching transformer is interrupted through the PWM IC.
The DPMS off mode and the power off mode caused by the pressed soft power key turn off the video signals applied to the CRT and the voltages generated from the voltage regulator while they turn on the driving voltage for the microcomputer and its peripheral I/O.
Such as in the conventional display monitor described above, the ultra power save mode is hardly achieved in the power off mode making use of the soft power key selected by the user because the DPMS mode brings the same power saving effect as the power off mode caused by the press of the soft power key.